Fundamentals of analog VLSI design

EE-424

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Welcome to the course on Fundamentals of Analog & Mixed Signal VLSI Design

Summary

This course provides the stepping stones to becoming an A/MS IC designer, from simply understanding the operation of a transistor in a simple circuit context. Students must be familiar with basic transistor/circuit concepts (a review will be provided in the first few weeks) to be introduced to more advanced constructs of A/MS circuit design spanning across devices, structures, and architectures. The course significantly expands on basic concepts of analog circuit design (e.g., KCL, gmro, S-domain) and introduces fundamentals of device modeling, noise, mismatch, aging, and reliability. It also covers widely-used functional circuit blocks (e.g., regulators, voltage reference) and their design considerations.

Coursebook

You can find more information about this course by looking at the course book.

Program

Week Schedule Topics Teacher
1 11.09.2024 Introduction
Technology roadmap
Prof. Enz
2 18.09.2024 Modeling of the MOS transistor for low-power design (long-channel)
Prof. Enz
3 25.09.2024 Modeling of the MOS transistor for low-power design (short-channel)
Prof. Enz
4 02.10.2024 Noise in circuits and systemsProf. Enz
5 09.10.2024 The concept of inversion coefficient and Gm/ID design methodology
Prof. Enz 
6 16.10.2024 Basic building blocks
Prof. Enz 
7 30.10.2024 Amplifiers (OTAs and OPAMPs) Part 1
Prof. Enz
8 06.11.2024 Amplifiers (OTAs and OPAMPs) Part 2
Prof. Enz
9 13.11.2024Offset and 1/f noise reduction techniques
Prof. Enz
10 20.11.2024 Continuous-time filters (CTFs)Prof. Enz
11 27.11.2024 Switched-capacitors filters (SCF)
Prof. Enz
12 04.12.2024 Reference circuits
Prof. Choo
13 11.12.2024Oscillators
Prof. Enz
14 18.12.2024 Comparators
Prof. Choo 

* Program may change depending on the process of the semester.

Course schedule and timing (Autumn Semester 2024)

This course will be given every Wednesday from 13:15 to 17:00 in room INF 119. We won't be providing a Zoom link or a lecture recording, so in-person participation in the lecture is highly encouraged. Typically, the lectures will comprise 2 hours of lecture and 2 hours (or less) of exercise/Q&A. Some weeks will include 3 hours of lecture and 1 hour of exercise/Q&A. 

Exercise / Q&A session

Exercises will be given out as homework, where a solution/Q&A session will be held during the exercise session of the following week which require you to use Jupiter Notebook. During the exercise sessions, the professor and the TAs will be present to answer all your questions, so come prepared.

Note, please follow the installation procedure below (in 'additional resources' section) to set up Jupiter Notebook.

Final exam Q&A session

A Q&A session schedule is to be determined.

Final Exam

The exam is a written exam with an open book. You can bring a paper/electronic copy of all the slides and exercises (problems and solutions). Please also bring a pen, paper (plenty!) and a calculator. Also, you must bring a laptop or a tablet to access the exam in Moodle. Thus, connected electronic devices are allowed; however, communication apps are strictly prohibited. And don't use ChatGPT (it will be wrong anyway)! The exam will be in MCQ format, and it will be similar to the exercises given during the semester (but would involve a bit more mathematical rigor).



Additional resources


1) Introduction (11.09.2024)

Contents:

  • Course description
  • What is circuit design
  • Technology roadmap

Slides:



2) Modeling of the MOS transistor for low-power design (long-channel) (18.09.2024)

Contents:

  • Introduction
  • The static model
  • The small-signal model
  • The noise model
  • Transistor matching

Slides:




3) Modeling of the MOS transistor for low-power design (short-channel) (25.09.2024)

Contents:

  • Introduction
  • Velocity saturation (VS)
  • Channel length modulation (CLM)
  • Drain-induced barrier lowering (DIBL)
  • Output conductance in saturation
  • Impact of short-channel effects on thermal noise
  • The simplified EKV model

Slides:



4) Noise in circuits and systems (2.10.2024)

Contents:

  • Introduction
  • Random signals and noise
  • Main noise sources of circuit components
  • Noise models of basic components
  • Noise calculation in continuous-time (CT) circuits
  • Summary

Slides:



5) The concept of inversion coefficient and Gm/ID design methodology (9.10.2024)

Contents:

  • Introduction
  • The concept of inversion coefficient
  • CS optimization in open-loop configuration
  • CS optimization in closed-loop configuration
  • Figures-of-merit (FoMs) as design guidelines
  • Conclusion

Slides:


6) Basic building blocks (16.10.2024)

Contents

  • Current mirrors
  • Cascode stage
  • Differential pair
  • Elementary gain cells and source follower
  • Current references



7) Amplifiers (OTAs and OPAMPs) (30.10.2024)

Contents

  • Introduction
  • OTA with capacitive feedback
  • The simple OTA
  • The symmetrical OTA


8) Amplifiers (OTAs and OPAMPs) (6.11.2024)

Contents

  • The two-stage OTA or Miller OTA
  • The telescopic OTA
  • The folded cascode OTA
  • The CMOS inverter OTA
  • Improved slew-rate OTAs


9) Offset and 1/f noise reduction techniques (13.11.2024)

Contents:

  • Introduction
  • Noise sampling
  • The autozero (AZ) technique
  • The chopper stabilization (CS) technique
  • Conclusion


10) Continuous-time filters (CTFs)

Contents:

  • Introduction
  • RC-active filters
  • MOSFET-C filters
  • Gm-C filters
  • Source-follower CTFs
  • Noise in CTFs
  • Automatic tuning



11) Switched-capacitors filters (SCF) (27.11.2024)

Contents:

  • Introduction
  • Basic principles
  • Non-ideal effects in SC circuits
  • The design of switched-capacitor filters (SCF)


12) Oscillators (11.12.2024)

Contents:

  • Introduction
  • General considerations
  • The 3-points oscillator
  • The cross-coupled pair oscillator



12) Reference circuits (4.12.2024)


14) Comparators (18.12.2024)


Exercise (18.09.2024)


Exercise (25.09.2024)


Exercise (2.10.2024)


Exercise (9.10.2024)


Exercise (16.10.2024)


Exercise (30.10.2024)


Exercise (6.11.2024)


Exercise (13.11.2024)


Exercise (20.11.2024)


Exercise (27.11.2024)


Exercise (4.12.2024)


Exercise (11.12.2024)


Exercise (18.12.2024)


[2022] Midterm


[2022] Final exam


[2023] Final exam


[2024] Final Exam