Computer architecture
CS-200
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Final Exam Seating Assignments
- CO 1 Seating Plan and Assignments (File)
- CO 2 Seating Plan and Assignments (File)
- CO 3 Seating Plan and Assignments (File)
- SG 1 138 Seating Plan and Assignments (File)
Streaming and Videos
Slides
- Introduction (Text and media area)
- Schedule (File)
- 0. Introduction (File)
- Part I: Instruction Set Architecture (Text and media area)
- 1a. ISA Reminder, Assembly Language, and Compilers (File)
- 1b. Branches, Functions, and Stack (File)
- 1c. Memory and Addressing Modes (File)
- 1d. Arrays and Data Structures (File)
- 1e. Arithmetic (File)
- Part II: Processor, I/Os, and Exceptions (Text and media area)
- 2a. Multicycle Processor (File)
- 2b. Inputs and Outputs (File)
- 2c. Interrupts (File)
- 2d. Exceptions (File)
- 2e. An Example of I/Os and Exceptions (File)
- Part III: Memory Hierarchy (Text and media area)
- 3a. Caches (File)
- 3b. Simple Cache Examples (File)
- 3c. Virtual Memory (File)
- 3d. Simple Virtual Memory Examples (File)
- Part IV: Instruction-Level Parallelism (Text and media area)
- 4a. Performance (File)
- 4b. Basic Pipelining (File)
- 4c. Pipelining (File)
- 4d. Dynamic Scheduling (File)
- 4e. Scheduling Examples (File)
- 4f. Besides and Beyond Superscalars (File)
- 4g. Intel x86 and ARM (File)
- Part V: Multiprocessors (Text and media area)
- 5a. Cache Coherence (File)
- 5b. Examples of Cache Coherence (File)
- 5c. Memory Consistency (File)
- Part VI: Hardware Security (Text and media area)
- 6. Hardware Security (File)
References
Exercises
- Instruction Set Architecture Exercises (with solutions) (File)
- Processors, I/Os, and Exceptions Exercises (with solutions) (File)
- Memory Hierarchy Exercises (with solutions) (File)
- Instruction-Level Parallelism Exercises (with solutions) (File)
- Multiprocessor Exercises (with solutions) (File)
- Exercise Book (File)
Labs
- Prerequisites for the labsYou must follow the Infr... (Text and media area)
- Infrastructure Tutorial (File)
- Assembly-Language Project Template (File)
- Verilog Coding Style Guide (File)
- Verible Flags: flags.txt (File)
- Lab A: A Game of Life in Assembly Language (Text and media area)
- Handout (File)
- Frequently Asked Questions (File)
- Solution Template (File)
- Demo Checklist (File)
- Lab B: RISC-V Multicycle Processor (Text and media area)
- CS_200__Usage_of_output_reg_vs_output_wire (File)
- LAB_B_Part_1_ALU (Folder)
- Lab_B_Part_2_Multicycle_RISC_V (Folder)
- Lab_B_Part_3_External_Memory_And_Peripherals (Folder)
- Lab C: RISC-V Interrupts (Text and media area)
- Lab_C_Part_1 (File)
- Lab_C_Part_1_template (File)
- Lab_C_Part_2 (File)
- Lab_C_Part_2_template (File)
- Lab C supplementary material (File)