Fundamentals of Analog VLSI Design
Exercise 8 - Problem

Design of the Simple OTA

Figure 1: Schematic of the simple differential OTA.

In this exercise we want to design the simple OTA of Figure 1 for the specifications given in Table 1 for a 180nm generic bulk CMOS process. The physical parameters are given in Table 2, the global process parameters in Table 3 and finally the MOSFET parameters in Table 4.

Reuse the analysis given in the lecture notes and use the equations for the design. The difference with the example given in the lecture notes, is the value of the gain-bandwidth product \(GBW\) which is ten times higher than the value in the example. This makes the design a bit more tricky because more sensitive to parasitic capacitances.

Follow the design flow proposed below:

• Start sizing the differential pair M_1a-M_1b using the \(GBW\) and DC gain specifications.
• Size the current mirror M_2a-M_2b using the DC gain specification and taking particular care that the non-dominant pole \(\omega_p = G_{m2}/C_2\) is at least 10 times higher than the \(GBW\).
• Finally, size the current mirror M_3a-M_3b for minimum common-mode input voltage of V_{ic} = 0.6,V$.
• Check that the specification on the random input-referred offset voltage is met.
• Validate your design using the provided qucs-s schematic.

Table 1: OTA specifications.

Specification	Symbol	Value	Unit
Minimum DC gain	\(A_{{dc}}\)	60	\(dB\)
Minimum gain-bandwidth product	\(GBW\)	10	\(MHz\)
Load capacitance	\(C_L\)	0.1	\(pF\)
Maximum input-referred offset voltage	\(V_{{os,max}}\)	4	\(mV\)

Table 2: Physical parameters

Parameter	Value	Unit
\(T\)	300	\(K\)
\(U_T\)	25.875	\(mV\)

Table 3: Global process parameters

Parameter	Value	Unit
\(V_{DD}\)	1.8	\(V\)
\(C_{ox}\)	8.443	\(\frac{fF}{\mu m^2}\)
\(W_{min}\)	200	\(nm\)
\(L_{min}\)	180	\(nm\)

Table 4: Transistor process parameters

Parameter	NMOS	PMOS	Unit
sEKV parameters
\(n\)	1.27	1.31	-
\(I_{{spec\Box}}\)	715	173	\(nA\)
\(V_{{T0}}\)	0.455	0.445	\(V\)
\(L_{{sat}}\)	26	36	\(nm\)
\(\lambda\)	20	20	\(\frac{{V}}{{\mu m}}\)
Overlap capacitances parameters
\(C_{{GDo}}\)	0.366	0.329	\(\frac{{fF}}{{\mu m}}\)
\(C_{{GSo}}\)	0.366	0.329	\(\frac{{fF}}{{\mu m}}\)
\(C_{{GBo}}\)	0	0	\(\frac{{fF}}{{\mu m}}\)
Junction capacitances parameters
\(C_J\)	1	1.121	\(\frac{{fF}}{{\mu m^2}}\)
\(C_{{JSW}}\)	0.2	0.248	\(\frac{{fF}}{{\mu m}}\)
Flicker noise parameters
\(K_F\)	8.1e-24	6.8e-23	\(J\)
\(AF\)	1	1	-
\(\rho\)	0.05794	0.4828	\(\frac{{V \cdot m^2}}{{A \cdot s}}\)
Matching parameters
\(A_{{VT}}\)	5	5	\(mV \cdot \mu m\)
\(A_{{\beta}}\)	1	1	\(\% \cdot \mu m\)
Source and drain sheet resistance parameter
\(R_{{sh}}\)	600	2386	\(\frac{{\Omega}}{{\mu m}}\)
Width and length parameters
\(\Delta W\)	39	54	\(\,nm\)
\(\Delta L\)	-76	-72	\(\,nm\)