@ARTICLE{bib:hosticka:jssc:14:6:1979,
  author={Hosticka, B.J.},
  journal={IEEE Journal of Solid-State Circuits}, 
  title={Improvement of the gain of MOS amplifiers},
  month={June},
  year={1979},
  volume={14},
  number={6},
  pages={1111-1114},
  keywords={Switches;Inverters;Large scale integration;Voltage;Geometry;Circuits;Frequency;Transconductance;Computer simulation;Bipolar transistors},
  doi={10.1109/JSSC.1979.1051324}}

@ARTICLE{bib:sackinger:jssc:25:1:1990,
  author={Sackinger, E. and Guggenbuhl, W.},
  journal={IEEE Journal of Solid-State Circuits}, 
  title={A high-swing, high-impedance MOS cascode circuit},
  month={Feb.},
  year={1990},
  volume={25},
  number={1},
  pages={289-298},
  keywords={Voltage;Feedback circuits;Mirrors;Output feedback;Impedance;MOSFETs;Capacitance;Circuit noise;Operational amplifiers;Laboratories},
  doi={10.1109/4.50316}}

@ARTICLE{bib:bult:jssc:25:6:dec:1990,
  author={Bult, K. and Geelen, G.J.G.M.},
  journal={IEEE Journal of Solid-State Circuits}, 
  title={A fast-settling CMOS op amp for SC circuits with 90-dB DC gain}, 
  year={1990},
  volume={25},
  number={6},
  pages={1379-1384},
  keywords={Operational amplifiers;Converters;Voltage;Feedback;Analog circuits;Filters;MOSFETs;Frequency measurement;Gain measurement;Bandwidth},
  doi={10.1109/4.62165}}

@article{bib:bult:aicsp:1991,
   Author = {Bult, K. and G. J. G. M. Geelen},
   Title = {{The CMOS gain-boosting technique}},
   Journal = {Analog Integrated Circuits and Signal Processing},
   Volume = {1},
   Number = {2},
   Pages = {119-135},
   Abstract = {The gain-boosting technique improves accuracy of cascoded CMOS circuits without any speed penalty. This is achieved by increasing the effect of the cascode transistor by means of an additional gain-stage, thus increasing the output impedance of the subcircuit. Used in opamp design, this technique allows the combination of the high-frequency behavior of a single-stage opamp with the high DC-gain of a multistage design. Bode-plot measurements show a DC-gain of 90 dB and a unity-gain frequency of 116 MHz (16 pF load). Settling measurements with a feedback factor of 1/3 show a fast single-pole settling behavior corresponding with a closed-loop bandwidth of 18 MHz (35 pF load) and a settling accuracy better than 0.03 percent. A more general use of this technique is presented in the form of a transistor-like building block: the Super-MOST. This compound circuit behaves as a normal MOS-transistor but has an intrinsic gain gm.ro of more than 90 dB. The building block is self-biasing and therefore very easy to design with. An opamp consisting of only 8 Super-MOST's and 4 normal MOST's has been measured showing results equivalent to the design mentioned above.},
   Month = {Jan.},
   Year = {1991} }



