Exercise 6 (30.10.2024)

Christian Enz

Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland

Initialization

Problem 2

Schematic of an elementary gain stage with resistive feedback.

  • Draw the small-signal schematic including all the noise sources.
  • Derive the small-signal transfer function $A_v(s) \triangleq \Delta V_{out}/\Delta V_{in}$. Give the DC gain $A_{dc}$ and cut-off frequency $f_c$ assuming that $G_{m1} \cdot R_f \gg 1$.
  • Calculate the input-referred noise resistance $R_{nin}$ and split it in terms of the input-referred thermal noise resistance $R_{nt}$ and flicker noise resistance $R_{nf}$.
  • Calculate the input-referred thermal noise excess factor $\gamma_{neq} \triangleq G_{m1} \cdot R_{nt}$.
  • How should M1, M2a and M2b be biased to minimize the input-referred thermal noise excess factor?
  • Design the amplifier for a DC gain $A_{dc}=10$ a cut-off frequency $f_c=1\,MHz$. Use the following parameters \begin{align*} &V_{T0n}=0.455\,V \quad n_{0n}=1.27 \quad I_{spec\Box n}=715\,nA\\ &V_{T0p}=0.445\,V \quad n_{0p}=1.31 \quad I_{spec\Box p}=173\,nA \end{align*} with $U_T=25.875\,mV$.

Solution to Problem 2

Small-signal equivalent circuit

Small-signal schematic of the elementary gain stage with resistive feedback including all the noise sources.

The equivalent small-signal schematic is shown in the above figure. Conductance $G_{out}$ is the sum of the output conductances of M1 and M2b $G_{out} = G_{ds1} + G_{ds2}$. Note that the noise current source $I_{n1}$ includes the noise of M1, M2a and M2b.

Small-signal voltage gain

The small-signal voltage gain assuming there is no load is given by \begin{equation*} A_v(s) \triangleq \frac{\Delta V_{out}}{\Delta V_{in}} = \frac{A_{dc}}{1+s/\omega_c}. \end{equation*} with \begin{align*} A_{dc} &= \frac{1-G_{m1}\,R_f}{1+G_{out}\,R_f},\\ \omega_c &= \frac{1+G_{out}\,R_f}{R_f\,C_L}. \end{align*} The DC gain is maximized by setting $G_{m1}\,R_f \gg 1$ and $G_{out}\,R_f \ll 1$, resulting in \begin{align*} A_{dc} &\cong G_{m1}\,R_f,\\ \omega_c &\cong \frac{1}{R_f\,C_L}. \end{align*}

Input-referred noise resistance

The input-referred noise resistance is given by \begin{equation*} R_{nin} = \left(\frac{R_f}{G_{m1}\,R_f-1}\right)^2 \cdot (G_{n1} + G_{n2}), \end{equation*} where $G_{n1}$ includes the thermal and flicker noise coming from M1, M2a and M2b and $G_{n2}=1/R_f$.

Thermal noise

Assuming that $G_{m1}\,R_f \gg 1$, the input-referred thermal noise resistance is given by \begin{equation*} R_{nt} = \frac{\gamma_{n1}}{G_{m1}} \cdot \left(1+\eta_{th}\right) = \frac{\gamma_{neq}}{G_{m1}} \end{equation*} and the amplifier thermal excess noise factor by \begin{equation*} \gamma_{neq} = \gamma_{n1} \cdot \left(1+\eta_{th}\right), \end{equation*} where \begin{equation*} \eta_{th} = \frac{1}{\gamma_{n1}\,G_{m1}\,R_f} + \frac{2 \gamma_{n2}}{\gamma_{n1}} \cdot \frac{G_{m2}}{G_{m1}}. \end{equation*} The first term corresponds to the contribution of the feedback resistance relative to that of M1, while the second term corresponds to the contribution of M2a and M2b relative to that of M1. We see that the contribution of $R_f$ can be made negligible by making $G_{m1}\,R_f$ (which is actually what was assuming above). The contribution of M2a and M2b can be minimized by making $G_{m1} \gg G_{m2}$. This can be realized by biasing M1 in weak inversion and M2a-M2b in strong inversion.

Flicker noise

The input-referred flicker noise resistance is given by \begin{equation*} R_{nf} = \frac{\rho_n}{W_1\,L_1\,f} \cdot \left(1 + \eta_{fl}\right), \end{equation*} with \begin{equation*} \eta_{fl} = 2\,\frac{\rho_p}{\rho_n} \cdot \left(\frac{G_{m2}}{G_{m1}}\right)^2 \cdot \frac{W_1\,L_1}{W_2\,L_2} \end{equation*} Finally the corner frequency is given by \begin{equation*} f_k = \frac{\rho_n}{W_1\,L_1} \cdot \frac{G_{m1}}{\gamma_{n1}} \cdot \frac{1+\eta_{fl}}{1+\eta_{th}} \end{equation*}

Design

Process parameters

Main physical parameters:
═════════════════════════
$T =$ 300 K
$U_T =$ 25.875 mV
Main process parameters for TSMC 0.18um:
════════════════════════════════════════
$V_{DD} =$ 1.8 V
$C_{ox} =$ 8.443 $\frac{{fF}}{{\mu m^2}}$
$W_{min} =$ 200 nm
$L_{min} =$ 180 nm
nNMOS parameters:
═════════════════
Long-channel sEKV parameters:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$n =$ 1.27
$I_{spec\Box} =$ 715 nA
$V_{T0} =$ 455 mV
$L_{sat} =$ 26 nm
$\lambda =$ 20 $\frac{{V}}{{\mu m}}$
Overlap capacitances:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$C_{GDo} =$ 0.366 $\frac{{fF}}{{\mu m}}$
$C_{GSo} =$ 0.366 $\frac{{fF}}{{\mu m}}$
$C_{GBo} =$ 0.000 $\frac{{fF}}{{\mu m}}$
Junction capacitances:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$C_J =$ 1.000 $\frac{{fF}}{{\mu m^2}}$
$C_{JSW} =$ 0.200 $\frac{{fF}}{{\mu m}}$
1/f noise parameters:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$K_F =$ 8.1e-24 J
$AF =$ 1.0
$\rho =$ 5.794e-02 $\frac{{V \cdot m^2}}{{A \cdot s}}$
Matching parameters:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$A_{VT} =$ 5 $mV \cdot \mu m$
$A_{\beta} =$ 1 $\% \cdot \mu m$
Source and drain sheet resistance:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$R_{sh} =$ 600 $\frac{\Omega}{\mu m}$
Channel width and length corrections
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$\Delta W =$ 39 nm
$\Delta L =$ −76 nm
pNMOS parameters:
═════════════════
Long-channel sEKV parameters:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$n =$ 1.31
$I_{spec\Box} =$ 173 nA
$V_{T0} =$ 445 mV
$L_{sat} =$ 36 nm
$\lambda =$ 20 $\frac{{V}}{{\mu m}}$
Overlap capacitances:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$C_{GDo} =$ 0.329 $\frac{{fF}}{{\mu m}}$
$C_{GSo} =$ 0.329 $\frac{{fF}}{{\mu m}}$
$C_{GBo} =$ 0.000 $\frac{{fF}}{{\mu m}}$
Junction capacitances:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$C_J =$ 1.121 $\frac{{fF}}{{\mu m^2}}$
$C_{JSW} =$ 0.248 $\frac{{fF}}{{\mu m}}$
1/f noise parameters:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$K_F =$ 6.8e-23 J
$AF =$ 1.0
$\rho =$ 4.828e-01 $\frac{{V \cdot m^2}}{{A \cdot s}}$
Matching parameters:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$A_{VT} =$ 5 $mV \cdot \mu m$
$A_{\beta} =$ 1 $\% \cdot \mu m$
Source and drain sheet resistance:
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$R_{sh} =$ 2386 $\frac{\Omega}{\mu m}$
Channel width and length corrections
‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
$\Delta W =$ 54 nm
$\Delta L =$ −72 nm

DC gain

The DC gain is set to

$A_{dc} = $ −10.0
$|A_{dc}| =$ 20 dB

Assuming that $G_{out}\,R_f \ll 1$, the DC gain depends on both $G_{m1}$ and $R_f$. However if the load capacitance is set, then $R_f$ is given by

$C_L =$ 1 pF
$f_c =$ 1 MHz
$GBW =$ 10 MHz
$R_f =$ 159.155 kOhm
$G_{m1} =$ 62.832 µA/V
$I_{b,min} =$ 2.1 µA

Choosing the inversion coefficient of M1 as $IC_1=0.1$, we can deduce the bias current $I_b$ as

$IC_1 =$ 0.1
$\frac{G_m\,n U_T}{I_D} = $ 0.916
$I_b =$ 2.3 µA

We can deduce $I_{spec}$ and $W/L$ for M1

$I_{spec1} =$ 22.6 µA
$\frac{W_1}{L_1} =$ 3.156e+01

Choosing $L_1=L_{min}$, we get

$W_1 =$ 5.68 µm
$L_1 =$ 180 nm

In order to minimize the contribution of M2a-M2b to the input-referred noise we choose $G_{m2}/G_{m1}=1/10$

$G_{m2} =$ 6.283 µA/V
$\frac{G_m\,n U_T}{I_D} = $ 0.094
$IC_2 =$ 102.3
$V_{DSsat2} =$ 533.5 mV
$V_{BG2}-V_{T0p} =$ 727.1 mV
$V_{BG2} =$ 1.2 V

We can now size M2

$I_{spec2} =$ 22.1 nA
$\frac{W_2}{L_2} =$ 1.274e-01

Choosing $W_2=W_{min}$, we get

$W_2 =$ 200 nm
$L_2 =$ 1.570 µm

Noise

The thermal noise excess factors are given by

$\gamma_{n1} =$ 0.636
$\gamma_{n2} =$ 0.871
$\eta_{th} =$ 0.137
$\gamma_{neq} =$ 0.723

The input-referred thermal noise resistance and PSD are given by

$R_{nt} =$ 12 kOhm
$\sqrt{S_{ninth}} =$ 13.802 $\frac{nV}{\sqrt{Hz}}$

The flicker noise PSd and corner frequency become

$(G_{m1}/G_{m2})^2 =$ 100.0
$\rho_p/\rho_n =$ 8.3
$\frac{W_1 \cdot L_1}{W_2 \cdot L_2} =$ 3.3
$\eta_{fl} =$ 0.130
$\sqrt{S_{ninfl}(100\,Hz)} =$ 4.270 $\frac{\mu V}{\sqrt{Hz}}$
$f_k =$ 9.6 MHz

To reduce the corner frequency we need to increase both $W_1\,L_1$. In order to keep $\eta_{fl}$ constant, we hence need to increase $W_2\,L_2$ at the same time. In order to bring the corner frequency down to 1 MHz we need to change $W_1$, $L_1$, $W_2$ and L_2$ according to

$W_1 =$ 17.57 µm
$L_1 =$ 556.87 nm
$W_2 =$ 618.74 nm
$L_2 =$ 4.86 µm

Simulations

.param VDD=1.8 Ib=2.26u
.param CL=1p
.param W1=5.68u L1=0.18u W2=0.20u L2=1.57u 

Transfer function

Starting Smash simulation...

----------------------------------------------------------------------
-
- SMASH (TM) release 7.6.0 (64-bit) of Jun 30 2020
- Copyright (c) Dolphin Design, 1992-2020. All Rights Reserved.
-
----------------------------------------------------------------------

Output directory L:\My Drive\Lectures\Master\Fundamentals of Analog VLSI Design\2024\Exercises\2024.10.30\Jupyter Notebook (VS)\Simulations\smash\Gain
Parsing circuit l:\My Drive\Lectures\Master\Fundamentals of Analog VLSI Design\2024\Exercises\2024.10.30\Jupyter Notebook (VS)\Simulations\smash\Gain\gainstage.pat
Loading circuit l:\My Drive\Lectures\Master\Fundamentals of Analog VLSI Design\2024\Exercises\2024.10.30\Jupyter Notebook (VS)\Simulations\smash\Gain\gainstage.pat
Processing top-level
Elaborating circuit...
Elaborating circuit (creating devices)...
Elaborating circuit (elaborating devices)...
Elaborating circuit (logic)...
Elaborating circuit (creating devices)...
Elaborating circuit (elaborating devices)...
Initializing...
Searching for HZ nets: 0%
Linking analog resolution matrix...
Load completed.
Operating-Point analysis (trying logarithmic damping heuristics)...
Iteration    1, residual  9.605e-04 on VDD
Iteration    2, residual  1.093e-03 on M3::DI
Iteration    3, residual  6.554e-04 on M3::DI
Iteration    4, residual  5.160e-04 on VDD
Iteration    5, residual  3.893e-04 on M2::SI
Iteration    6, residual  2.758e-04 on M2::SI
Iteration    7, residual  1.780e-04 on M2::SI
Iteration    8, residual  9.918e-05 on M2::SI
Iteration    9, residual  4.284e-05 on M2::SI
Iteration   10, residual  1.136e-05 on M2::SI
Iteration   11, residual  2.954e-06 on M1::DI
Iteration   12, residual  2.282e-06 on M1::DI
Iteration   13, residual  1.435e-06 on M1::DI
Iteration   14, residual  6.548e-07 on M1::DI
Iteration   15, residual  1.404e-07 on M1::DI
Iteration   16, residual  4.898e-09 on M1::DI
Iteration   17, residual  3.470e-12 on M1::DI


Operating point analysis completed (converged)
Small Signal
Small signal analysis completed
Launch Measurements: 6
End Measurements

CPU Time:     1s 203ms 125us
Elapsed Time: 3s 723ms 8us

Adc = 19.994 dB
fc = 1.123e+06 Hz
GBW = 1.117e+07 Hz

The DC gain is achieved and the cut-off frequency is slightly large than the spcecs.

Noise

Starting Smash simulation...

----------------------------------------------------------------------
-
- SMASH (TM) release 7.6.0 (64-bit) of Jun 30 2020
- Copyright (c) Dolphin Design, 1992-2020. All Rights Reserved.
-
----------------------------------------------------------------------

Output directory L:\My Drive\Lectures\Master\Fundamentals of Analog VLSI Design\2024\Exercises\2024.10.30\Jupyter Notebook (VS)\Simulations\smash\Gain
Parsing circuit l:\My Drive\Lectures\Master\Fundamentals of Analog VLSI Design\2024\Exercises\2024.10.30\Jupyter Notebook (VS)\Simulations\smash\Gain\gainstage.pat
Loading circuit l:\My Drive\Lectures\Master\Fundamentals of Analog VLSI Design\2024\Exercises\2024.10.30\Jupyter Notebook (VS)\Simulations\smash\Gain\gainstage.pat
Processing top-level
Elaborating circuit...
Elaborating circuit (creating devices)...
Elaborating circuit (elaborating devices)...
Elaborating circuit (logic)...
Elaborating circuit (creating devices)...
Elaborating circuit (elaborating devices)...
Initializing...
Searching for HZ nets: 0%
Linking analog resolution matrix...
Load completed.
Operating-Point analysis (trying logarithmic damping heuristics)...
Iteration    1, residual  9.605e-04 on VDD
Iteration    2, residual  1.093e-03 on M3::DI
Iteration    3, residual  6.554e-04 on M3::DI
Iteration    4, residual  5.160e-04 on VDD
Iteration    5, residual  3.893e-04 on M2::SI
Iteration    6, residual  2.758e-04 on M2::SI
Iteration    7, residual  1.780e-04 on M2::SI
Iteration    8, residual  9.918e-05 on M2::SI
Iteration    9, residual  4.284e-05 on M2::SI
Iteration   10, residual  1.136e-05 on M2::SI
Iteration   11, residual  2.954e-06 on M1::DI
Iteration   12, residual  2.282e-06 on M1::DI
Iteration   13, residual  1.435e-06 on M1::DI
Iteration   14, residual  6.548e-07 on M1::DI
Iteration   15, residual  1.404e-07 on M1::DI
Iteration   16, residual  4.898e-09 on M1::DI
Iteration   17, residual  3.470e-12 on M1::DI


Operating point analysis completed (converged)
Noise
Noise analysis completed
Launch Measurements: 6
End Measurements

CPU Time:     1s 15ms 625us
Elapsed Time: 3s 602ms 337us

The noise simulation perfectly match the theoretical results.