Exercise 6 (30.10.2024)
Christian Enz
Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland
Initialization¶
Problem 1¶
Schematic of an elementary gain stage with diode connected load.
- Draw the small-signal schematic including all the noise sources.
- Derive the small-signal transfer function $A_v(s) \triangleq \Delta V_{out}/\Delta V_{in}$. Give the DC gain $A_{dc}$ and cut-off frequency $f_c$.
- How should M1 and M2 be biased to maximize the DC voltage gain?
- What is the maximum achievable voltage gain?
- Calculate the input-referred noise resistance $R_{nin}$ and split it in terms of the input-referred thermal noise resistance $R_{nt}$ and flicker noise resistance $R_{nf}$.
- Calculate the input-referred thermal noise excess factor $\gamma_{neq} \triangleq G_{m1} \cdot R_{nt}$.
- How should M1 and M2 be biased to minimize the input-referred thermal noise excess factor?
- Design the amplifier for a DC gain $A_{dc}=10$ a cut-off frequency $f_c=1\,MHz$. Use the following parameters \begin{align*} &V_{T0n}=0.455\,V \quad n_{0n}=1.27 \quad I_{spec\Box n}=715\,nA\\ &V_{T0p}=0.445\,V \quad n_{0p}=1.31 \quad I_{spec\Box p}=173\,nA \end{align*} with $U_T=25.875\,mV$.
Solution to Problem 1¶
Small-signal equivalent circuit¶
Small-signal schematic of an elementary gain stage with diode connected load including all the noise sources.
The equivalent small-signal schematic is shown in the above figure. We have neglected the output conductances of M1 and M2 because it comes in parallel with $G_{m2}$ and usually we can consider that $G_{ds1},G_{gds2} \ll G_{m2}$.
Small-signal voltage gain¶
The small-signal voltage gain assuming there is no load is given by \begin{equation*} A_v(s) \triangleq \frac{\Delta V_{out}}{\Delta V_{in}} = \frac{A_{dc}}{1+s/\omega_c}. \end{equation*} with \begin{align*} A_{dc} &= -\frac{G_{m1}}{G_{m2}},\\ \omega_c &= \frac{G_{m2}}{C_L}. \end{align*}
The DC voltage gain is maximized when M1 is biased in weak inversion and M2 in strong inversion. In this case we have \begin{align*} G_{m1} &= \frac{I_b}{n_1\,U_T},\\ G_{m2} &= \frac{2 I_b}{V_{P2}} = \frac{2 n_2 \, I_b}{V_{G2}-V_{T0p}}, \end{align*} which results in \begin{equation*} A_{dc} = -\frac{V_{BG2}-V_{T0p}}{2 n_1 \, n_2 \, U_T}. \end{equation*} Since M1 is biased in weak inversion its saturation voltage is about $V_{Dsat1}=4\,U_T$. The maximum voltage gain is then given by \begin{equation*} A_{dc,max} \cong -\frac{V_{DD}-4\,U_T-V_{T0p}}{2 n_1 \, n_2 \, U_T}. \end{equation*}
The voltage gain is ultimately limited by the supply voltage (and the pMOS threshold voltage).
Input-referred noise resistance¶
The input-referred noise resistance is given by \begin{equation*} R_{nin} = \frac{G_{n1} + G_{n2}}{G_{m1}^2}, \end{equation*} where \begin{equation*} G_{ni} = \gamma_{ni} \cdot G_{mi} + G_{mi}^2 \cdot \frac{\rho_i}{W\,L\,f} \quad \textsf{for $i=1,2$} \end{equation*}
Thermal noise¶
The input-referred thermal noise resistance is given by \begin{equation*} R_{nt} = \frac{\gamma_{n1}}{G_{m1}} \cdot \left(1+\eta_{th}\right) = \frac{\gamma_{neq}}{G_{m1}} \end{equation*} and the amplifier thermal excess noise factor by \begin{equation*} \gamma_{neq} = \gamma_{n1} \cdot \left(1+\eta_{th}\right), \end{equation*} where \begin{equation*} \eta_{th} = \frac{\gamma_{n2}}{\gamma_{n1}} \cdot \frac{G_{m2}}{G_{m1}} = \frac{\gamma_{n2}}{\gamma_{n1}} \cdot \frac{1}{|A_v|}. \end{equation*}
Since the gain is set by setting the quiescent output voltage, we can estimate the contribution of M2 to the input thermal noise relative to that of M1
Flicker noise¶
The input-referred flicker noise resistance is given by \begin{equation*} R_{nf} = \frac{\rho_n}{W_1\,L_1\,f} \cdot \left(1 + \eta_{fl}\right), \end{equation*} with \begin{equation*} \eta_{fl} = \frac{\rho_p}{\rho_n} \cdot \left(\frac{G_{m2}}{G_{m1}}\right)^2 \cdot \frac{W_1\,L_1}{W_2\,L_2} \end{equation*} Finally the corner frequency is given by \begin{equation*} f_k = \frac{\rho_n}{W_1\,L_1} \cdot \frac{G_{m1}}{\gamma_{n1}} \cdot \frac{1+\eta_{fl}}{1+\eta_{th}} \end{equation*}
Design¶
Process parameters¶
DC gain¶
The maximum DC gain is given by
We choose a DC voltage $A_{dc}$
The transconductances $G_{m1}$, $G_{m2}$ and the minimum bias current $I_{b,min}$ for achieving the required cut-off frequency are given by
Choosing the inversion coefficient of M1 as $IC_1=0.1$, we can deduce the bias current $I_b$ as
We can deduce $I_{spec}$ and $W/L$ for M1
Choosing $L_1=L_{min}$, we get
Having $G_{m2}$ and $I_b$, we can deduce
We can now size M2
Choosing $W_2=W_{min}$, we get
Noise¶
The thermal noise excess factors are given by
The input-referred thermal noise resistance and PSD are given by
The flicker noise PSD and corner frequency are given by
To reduce the corner frequency we need to increase both $W_1\,L_1$. In order to keep $\eta_{fl}$ constant, we hence need to increase $W_2\,L_2$ at the same time. In order to bring the corner frequency down to 1 MHz we need to change $W_1$, $L_1$, $W_2$ and L_2$ according to
Simulations¶
Transfer function¶
The DC gain is achieved and the cut-off frequency is slightly higher than the specs.
Noise¶
The simulated input-referred noise perfectly match the theoretical prediction.